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A Formal Design Methodology For Parallel Architectures

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dc.contributor.advisor Elleithy, Khaled M. en_US
dc.contributor.author Elleithy, Khaled M. en_US
dc.contributor.author Bayoumi, Magdy A. en_US
dc.date.accessioned 2014-07-16T16:54:16Z
dc.date.available 2014-07-16T16:54:16Z
dc.date.issued 1990-09-05 en_US
dc.identifier.other 91b51363-1b4c-21f3-941b-460b86fe52b9 en_US
dc.identifier.uri https://scholarworks.bridgeport.edu/xmlui/handle/123456789/721
dc.description.abstract In this paper, we introduce a formal approach for synthesis of array architectures. Four different forms are used to express the input algorithm: simultaneous recursion, recursion with respect to different variables, fixed nesting and variable nesting. Four different architectures for the same algorithm are obtained. As an example, a matrix-matrix multiplication algorithm is used to obtain four different optimal architectures. The different architectures of this example are compared in terms of area, time, broadcasting and required hardware. en_US
dc.description.uri http://ieeexplore.ieee.org.libproxy.bridgeport.edu/stamp/stamp.jsp?tp=&arnumber=145496 en_US
dc.publisher IEEE en_US
dc.subject Algorithms analysis en_US
dc.subject Computer architecture en_US
dc.subject Computer science en_US
dc.subject Data algorithms en_US
dc.subject Parallel and distributed processing en_US
dc.title A Formal Design Methodology For Parallel Architectures en_US
dc.type Article en_US
dc.notes 11/16/11-Posted just link to IEEE en_US
dc.event.name International Conference on Application Specific Array Processors en_US

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