A Formal High Level Synthesis Approach For DSP Architectures
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Authors
Elleithy, Khaled M.
Bayoumi, Magdy A.
Issue Date
1990-04-01
Type
Article
Language
Keywords
Algorithms analysis , Computer science , Data algorithms , Engineering , Information systems , Programming
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Abstract
In this paper, we introduce a novel approach for high level synthesis for DSP algorithms. Two features are provided by the approach: completeness and correctness. A given algorithm will be represented in a new developed language termed Algorithm Specification Language (ASL). ASL has the ability to describe any general algorithm. An automatic procedure is used to transform an ASL representation into a specific realization specification using a correctness preserving set of transformations. The realization format is based on representing the digital architectures by another developed language called Realization Specification Language (RSL). Logic Programming is used as a user interface for the synthesis procedure.
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Citation
Publisher
IEEE