Formal Verification of DSP VLSI Architectures: A Tutorial
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Authors
Elleithy, Khaled M.
Al-Humaigani, Muhammad A.
Issue Date
1994-08-03
Type
Article
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Abstract
In this tutorial paper the area of formal verification of DSP VLSI architectures is presented. The paper discuses the following topics: production systems, formal logic, the equational approach, and the signal flow graph approach. Each approach is explained using one or more of the current available systems.
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Publisher
IEEE