Hoover: Hardware Object-Oriented Verification
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Authors
Elleithy, Khaled M.
Aref, Mostafa A.
Issue Date
1998-02-19
Type
Article
Language
Keywords
Algorithms analysis , Computer engineering , Computer science , Data algorithms , Electrical engineering , Engineering , Very-large-scale integration (VLSI) design , Very-large-scale integration (VLSI)
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Abstract
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In this paper a new formal hardware verification approach based on object oriented techniques is presented. The HOOVER system (Hardware Object Oriented VERification) is described. A cell library of different hardware components has been implemented as classes. Components in the cell library are described at the transistor level, gate level, logical level, and functional level. The verification of a CMOS inverter and 1-bit CMOS adder using HOOVER is given in the paper.